# Makefile

A `Makefile` is a simple text file used by the `make` build automation tool to manage dependencies and automate the compilation of programs. It defines a set of rules to follow in order to compile and link the program. The `make` tool uses these rules to decide how to build and update executables, libraries, and other files in a project.

## Basic Structure
A `Makefile` consists of:
1. **Targets** – The files that need to be created.
2. **Dependencies** – The files that a target depends on.
3. **Commands** – The shell commands that make will run to create the target.

### General Syntax:
```
target: dependencies
    command
```

- `target`: The file to be created or updated (often the executable or object files).
- `dependencies`: Files that are required to build the target.
- `command`: A shell command to execute. Commands are usually preceded by a tab (not spaces).

This project uses two Makefiles for different purposes:

1. **Project Root Makefile (`Makefile`)**

   - Used to install essential dependencies for development.
   - Handles basic setup tasks.
   - Primarily serves as a bootstrap for initializing the development environment.

2. **Documentation Makefile (`docs/Makefile`)**
   - Auto-generated by the `sphinx-quickstart` command.
   - Used for building project documentation.
   - Should not be called directly; instead, use the `just` file to execute documentation-related commands.

## Usage

The primary Makefile in the root directory is used to set up the development environment. Typical commands include:

```sh
make check   		# To check system requirements
make install-uv     # To install the `uv` tool
```

## Additional Resources

For more details on how Makefiles work, refer to the [GNU Make Manual](https://www.gnu.org/software/make/manual/make.html).